ISRO Electronics & Communication (ECE) 2006 Question Paper & Solutions
Attempt the ISRO Electronics & Communication (ECE) 2006 previous year paper in real CBT exam mode or practice mode with verified answers and explanations.
All ISRO Electronics & Communication (ECE) papers
80 questions.
Question 1
Topic: Network Theory
The value of C which gives the critical damping in the given circuit is (R = 1 ohm, L = 2H)
Answer: C. 8F
Explanation: In a series RLC circuit, for critical damping, the damping factor is equal to the resonant frequency. R/(2L) = 1/$\sqrt{LC}$. Solving for C gives C = 4L/(R²). Substituting R = 1 and L = 2 gives C = 8F.
Question 2
Topic: Network Theory
A series RLC circuit resonates at 3 MHz and has 3-dB bandwidth of 10 kHz. The Q of the circuit at resonance
- A. 30
- B. 300/$\sqrt{2}$
- C. 300
- D. 300*$\sqrt{2}$
Answer: C. 300
Explanation: The quality factor (Q) of a resonant circuit is defined as the ratio of resonant frequency to the bandwidth. Q = f_r / B.W. = (3 * 10^6) / (10 * 10^3) = 300.
Question 3
Topic: Network Theory
The value of resistance R shown in the given figure
- A. 3.5 ohm
- B. 2.5 ohm
- C. 1 ohm
- D. 4.5 ohm
Answer: A. 3.5 ohm
Explanation: Applying KCL at the node above the 7-ohm resistor, let the voltage be V. (V - 50)/6 + V/7 + 4 = 0. Solving this gives V = 14 V. Since the current through R is 4 A, R = V / 4 = 14 / 4 = 3.5 ohm.
Question 4
Topic: Network Theory
At 3-dB frequencies, current in the series RLC circuit is equal to current at resonance multiplied by
- A. 1/2
- B. 1/$\sqrt{2}$
- C. 1/4
- D. 1/(2*$\sqrt{2}$)
Answer: B. 1/$\sqrt{2}$
Explanation: At the 3-dB cutoff frequencies, the power dissipated is half of the maximum power at resonance. Therefore, the current is 1/$\sqrt{2}$ times the current at resonance.
Question 5
Topic: Network Theory
A series RLC circuit resonates at 1000 kHz. At frequency of 995 kHz, the circuit impedance is
- A. Resistive
- B. Minimum
- C. Inductive
- D. Capacitive
Answer: D. Capacitive
Explanation: In a series RLC circuit, below the resonant frequency (f < f_0), capacitive reactance (1/wC) is greater than inductive reactance (wL). Thus, the overall impedance is capacitive.
Question 6
Topic: Analog Circuits
If each stage had gain of 10 dB and noise figure of 10 dB, then the overall noise figure of two-stage cascade amplifier will be
- A. 10
- B. 1.09
- C. 1.0
- D. 10.9
Answer: D. 10.9
Explanation: First, convert dB to absolute ratios: Gain G1 = 10, Noise Figure F1 = 10, F2 = 10. Using Friis formula: F_overall = F1 + (F2 - 1) / G1 = 10 + (10 - 1) / 10 = 10 + 0.9 = 10.9.
Question 7
Topic: Digital Circuits
In sigma delta ADC, high bit accuracy is achieved by
- A. Over sampling and noise shaping
- B. Over sampling
- C. Under sampling
- D. None of the above
Answer: A. Over sampling and noise shaping
Explanation: Sigma-delta ADCs achieve high resolution through oversampling (sampling much faster than the Nyquist rate) combined with noise shaping, which pushes quantization noise into higher frequencies that are then filtered out.
Question 8
Topic: Signals and Systems
Let delta(t) denote the delta function. The value of the integral from -a to a of delta(t)*cos(3t/2) dt is
Answer: A. 1
Explanation: Using the sifting property of the Dirac delta function, integral from -a to a of f(t)delta(t) dt = f(0) as long as the integration interval contains t=0. Here, f(t) = cos(3t/2). Evaluating at t=0 gives cos(0) = 1.
Question 9
Topic: Signals and Systems
Consider the compound system shown in below figure. Its output is equal to the input with a delay of two units. If the transfer function of the first system is given by H1(Z) = (Z - 0.5)/(Z - 0.8), then the transfer function of the second system H2(Z) is
- A. H2(Z) = (Z^-2 - 0.2Z^-3)/(1 - 0.4Z^-1)
- B. H2(Z) = (Z^-2 - 0.8Z^-3)/(1 - 0.5Z^-1)
- C. H2(Z) = (Z^-1 - 0.2Z^-3)/(1 - 0.4Z^-1)
- D. H2(Z) = (Z^-2 - 0.8Z^-3)/(1 - 0.5Z^-1)
Answer: B. H2(Z) = (Z^-2 - 0.8Z^-3)/(1 - 0.5Z^-1)
Explanation: The overall transfer function is a delay of two units, so H(Z) = Z^-2. Since H(Z) = H1(Z) * H2(Z), H2(Z) = Z^-2 / H1(Z) = Z^-2 * (Z - 0.8)/(Z - 0.5). Multiplying numerator and denominator by Z^-1 yields (Z^-2 - 0.8Z^-3)/(1 - 0.5Z^-1).
Question 10
Topic: Signals and Systems
The z-transform of the signal x(n) = {1 for n=-1; 2 for n=0; -1 for n=1; 1 for n=2; 0 otherwise}
- A. z + 2 - z^-1 + z^-2
- B. z^-1 + 2 - z + z²
- C. z + 2z^2 - z^-1 + z^-2
- D. z + 2 - z^+1 + z^-2
Answer: A. z + 2 - z^-1 + z^-2
Explanation: By definition, X(z) = sum_{n=-infinity}^{infinity} x(n)z^{-n}. Plugging in the values: X(z) = 1*z^{-(-1)} + 2*z^{0} + (-1)*z^{-1} + 1*z^{-2} = z + 2 - z^-1 + z^-2.
Question 11
Topic: Network Theory
For the circuit shown in the given figure, the voltage V_AB is
- A. 6 V
- B. 10 V
- C. 25 V
- D. 40 V
Answer: A. 6 V
Explanation: Applying KCL at node B with node A as reference (0V): (V_B - 10)/5 + V_B/5 + (V_B + 50)/10 = 0. Solving for V_B: 2(V_B - 10) + 2V_B + V_B + 50 = 0 => 5V_B + 30 = 0 => V_B = -6 V. Thus V_BA = -6V, so V_AB = 6V.
Question 12
Topic: Network Theory
The equivalent capacitance across 'ab' will be (a combination of five 0.1 uF capacitors)
- A. 0.2 uF
- B. 0.1 uF
- C. 0.5 uF
- D. 0
Answer: B. 0.1 uF
Explanation: The capacitors are arranged in a bridge structure. Because all capacitors are identical (0.1 uF), the bridge is balanced. The capacitor in the middle branch can be removed, reducing the circuit to two parallel branches each containing two series capacitors, yielding an equivalent capacitance of 0.1 uF.
Question 13
Topic: Control Systems
The transfer function, T(s) = s / (s + a) is that of a
- A. Low-pass filter
- B. Notch filter
- C. High-pass filter
- D. Band-pass filter
Answer: C. High-pass filter
Explanation: Substituting s = jw, the magnitude is |T(jw)| = w / $\sqrt{w² + a²}$. At w = 0, gain is 0. At w approaching infinity, gain approaches 1. This characteristic represents a high-pass filter.
Question 14
Topic: Network Theory
A particular current is made up of two components: a 10 A dc and a sinusoidal current of peak value of 1.414 A. The average value of the resultant current is
- A. zero
- B. 24.14 A
- C. 10 A
- D. 14.14 A
Answer: C. 10 A
Explanation: The resultant current is i(t) = 10 + 1.414*sin(wt). The average value of a pure sinusoidal wave over a full cycle is zero. Therefore, the average value of the resultant current is simply the DC component, which is 10 A.
Question 15
Topic: Communication Systems
By doubling the sampling frequency
- A. Quantisation noise decreases by 3 dB
- B. Quantisation noise density decreases by 3 dB
- C. Quantisation noise increases by 3dB
- D. Quantisation noise density increases by 3 dB
Answer: A. Quantisation noise decreases by 3 dB
Explanation: Quantization noise power is inversely proportional to the sampling frequency when appropriately filtered. Doubling the sampling frequency reduces the noise by a factor of 2, which corresponds to a 3 dB decrease: 10*log10(1/2) = -3 dB.
Question 16
Topic: Analog Circuits
The output voltage (V_0) of the circuit shown in the given figure is (V1=13V, input resistor 1k, two 6.3V zener diodes connected back-to-back)
- A. zero
- B. 5.7 V
- C. 6.9 V
- D. 12.6 V
Answer: C. 6.9 V
Explanation: In a back-to-back zener diode configuration with an input of 13V, one zener diode will be forward-biased (acting as a normal diode with approximately 0.6V drop) and the other will be reverse-biased in its breakdown region (acting as a 6.3V voltage regulator). The total output voltage is the sum of these voltage drops: V_0 = 6.3V + 0.6V = 6.9V.
Question 17
Topic: Digital Circuits
Assuming that only the X and Y logic inputs are available and their complements X_bar and Y_bar are not available, what is the minimum number of two-input NAND gates required to implement X XOR Y?
Answer: C. 4
Explanation: To implement an XOR gate using only two-input NAND gates without inverted inputs readily available, a minimum of 4 NAND gates are required. The configuration uses one NAND gate for (X NAND Y), and then uses its output as inputs to two subsequent NAND gates along with X and Y respectively, feeding into a final fourth NAND gate.
Question 18
Topic: Digital Circuits
In the given network of AND and OR gates f can be written as: (cascade of AND and OR gates)
- A. X0X1X2......Xn + X1X2.....Xn + X2X3....Xn
- B. X0X1 + X2 + X3 + ......Xn-1.Xn
- C. X0 + X1 + X2 + ......Xn
- D. X0X1X3......Xn-1 + X2 + X3 + X5....Xn-1 + ..... + Xn-2 + Xn-1 + Xn
Answer: D. X0X1X3......Xn-1 + X2 + X3 + X5....Xn-1 + ..... + Xn-2 + Xn-1 + Xn
Explanation: By tracing the logic network stage by stage, the Boolean function is evaluated accumulating the products and sums depending on the arrangement of AND and OR gates. Option (d) matches the accumulated output sequence described in the standard logic circuit problem this is referencing.
Question 19
Topic: Digital Circuits
A pulse train with a frequency of 1 MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is
- A. 100 n sec
- B. 50 n sec
- C. 20 n sec
- D. 10 n sec
Answer: A. 100 n sec
Explanation: For a ripple counter with N stages, the maximum operating frequency f_max = 1 / (N * t_pd). A modulo-1024 counter requires 10 flip-flops (since 2^10 = 1024), so N = 10. Thus, t_pd = 1 / (N * f_max) = 1 / (10 * 10^6) = 10^-7 seconds = 100 nsec.
Question 20
Topic: Digital Circuits
The A/D converter used in a digital voltmeter, could be (1) successive approximation type (2) Flash converter type (3) Dual slope converter type. The correct sequence in the increasing order of their conversion times is
- A. 1, 2, 3
- B. 2, 1, 3
- C. 3, 2, 1
- D. 3, 1, 2
Answer: B. 2, 1, 3
Explanation: Flash converters are the fastest ADCs (shortest conversion time). Successive approximation ADCs are slower than flash but faster than dual-slope. Dual-slope integrating ADCs are the slowest but offer high resolution and noise rejection, hence widely used in digital voltmeters. Thus, increasing order of conversion time is Flash (2), SAR (1), Dual-slope (3).
Question 21
Topic: Digital Circuits
The resolution of D/A converter is approximately 0.4% of its full-scale range. It is
- A. An 8-bit converter
- B. A 10-bit converter
- C. A 12 bit converter
- D. A 16 bit converter
Answer: A. An 8-bit converter
Explanation: The resolution of a D/A converter as a percentage is given by (1 / (2^n - 1)) * 100% or approximately (1 / 2^n) * 100%. For an 8-bit converter, 1 / 2^8 = 1 / 256 = 0.0039, which is approximately 0.39% or 0.4%.
Question 22
Topic: Microprocessors
In a microprocessor, the resistor [register] which holds the address of the next instruction to be fetched is
- A. Accumulator
- B. Program counter
- C. Stack pointer
- D. Instructor register
Answer: B. Program counter
Explanation: The Program Counter (PC) is a dedicated register in a microprocessor that always contains the memory address of the next instruction to be fetched and executed.
Question 23
Topic: Microprocessors
In microcomputer, WAIT states are used to
- A. Make the processor wait during a DMA operation
- B. Make the processor wait during a power interrupt processing
- C. Make the processor wait during a power shutdown
- D. Interface slow peripherals to the processor
Answer: D. Interface slow peripherals to the processor
Explanation: WAIT states are inserted into the microprocessor's machine cycles to stall the CPU temporarily. This allows slower memory or peripheral I/O devices extra time to place data on the bus or read data from it.
Question 24
Topic: Digital Circuits
Which of the following statements are correct? \n1. A flip-flop is used to store 1 bit of information. \n2. Race-around condition occurs in a J-K flip-flops when both the inputs are 1. \n3. Master-slave configuration is used in flip-flops to store 2 bits of information. \n4. A transparent latch consists of a D-type flip-flop
- A. 1, 2 and 3
- B. 1, 3 and 4
- C. 1, 2 and 4
- D. 2, 3 and 4
Answer: C. 1, 2 and 4
Explanation: Statement 1 is correct (a flip-flop stores 1 bit). Statement 2 is correct (toggling continuously during the high clock level causes race-around). Statement 4 is considered correct in standard multiple-choice contexts (a D-latch is transparent). Statement 3 is incorrect; a master-slave configuration still stores only 1 bit, but prevents the race-around condition.
Question 25
Topic: Digital Circuits
How many 1's are present in the binary representation of 3 x 512 + 7 x 64 + 5 x 8 + 3?
Answer: B. 9
Explanation: Express the expression in powers of 2: \n3 x 512 = 3 x 2^9 = (2+1)2^9 = 2^10 + 2^9 (2 ones). \n7 x 64 = 7 x 2^6 = (4+2+1)2^6 = 2^8 + 2^7 + 2^6 (3 ones). \n5 x 8 = 5 x 2^3 = (4+1)2^3 = 2^5 + 2^3 (2 ones). \n3 = 2^1 + 2^0 (2 ones). \nTotal ones = 2 + 3 + 2 + 2 = 9.
Question 26
Topic: Digital Circuits
For emitter-coupled logic, the switching speed is very high because
- A. Negative logic, is used
- B. The transistors are not saturated when conducting
- C. Emitter-coupled transistor are used
- D. Multi-emitter transistors are used
Answer: B. The transistors are not saturated when conducting
Explanation: Emitter-Coupled Logic (ECL) is the fastest logic family because its transistors are biased to operate in the active region, rather than saturation. This eliminates storage time delays that occur when bringing a transistor out of deep saturation.
Question 27
Topic: Digital Circuits
The output of the circuit shown below is (1 MHz Oscillator -> Divider /10^6 -> Flip Flop -> Schmitt trigger -> Output)
- A. A pulse train of duration 0.5 sec
- B. A pulse train of duration 2 sec
- C. A pulse train of duration 1 sec
- D. A pulse train of duration 5 sec
Answer: B. A pulse train of duration 2 sec
Explanation: The 1 MHz oscillator output is divided by 10^6, resulting in a 1 Hz frequency. The flip-flop acts as a toggle (divide-by-2 circuit), changing state on the clock edges, which yields an output frequency of 0.5 Hz. The time period (duration of one full cycle) is T = 1 / f = 1 / 0.5 = 2 seconds.
Question 28
Topic: Digital Circuits
Gray code for number 7 is
- A. 1100
- B. 1001
- C. 0110
- D. 0100
Answer: D. 0100
Explanation: The binary representation for 7 is 0111. To convert to Gray code: keep the MSB (0). Next bit = 0 XOR 1 = 1. Next bit = 1 XOR 1 = 0. Next bit = 1 XOR 1 = 0. Thus, the Gray code is 0100.
Question 29
Topic: Digital Circuits
10 bit A/D converters, the quantization error is given by (in percent)
Answer: C. 0.1
Explanation: For an n-bit ADC, the maximum percentage resolution (which dictates quantization step) is roughly (1 / 2^n) * 100%. For n=10, 2^10 = 1024. Therefore, the resolution/error is approximately (1 / 1024) * 100% ≈ 0.1%.
Question 30
Topic: Digital Circuits
For the switch circuit, taking open as 0 and closed as 1, the expression for the circuit in Y (A in series with parallel combination of (B in series with C) and D)
- A. A + (B + C)D
- B. A + BC + D
- C. A(BC + D)
- D. None of these
Answer: C. A(BC + D)
Explanation: Switches in series correspond to an AND operation (multiplication), and switches in parallel correspond to an OR operation (addition). Switches B and C are in series (B * C), and they are in parallel with D (BC + D). This entire block is in series with A, yielding A * (BC + D).
Question 31
Topic: Digital Circuits
The Boolean expression for the shaded area in the Venn diagram is (Venn diagram with sets X, Y, Z where the intersection of X and Y is shaded, as well as the region of Z excluding X and Y)
- A. X_bar + Y_bar + Z
- B. X*Y_bar*Z_bar + X_bar*Y*Z
- C. X + Y + Z
- D. X_bar*Y_bar*Z + X*Y
Answer: D. X_bar*Y_bar*Z + X*Y
Explanation: Based on the provided Venn diagram, the shaded regions represent the intersection of sets X and Y (which is X*Y) and the region of Z that does not intersect with either X or Y (which is X_bar*Y_bar*Z). The logical OR of these two disjoint regions gives the expression X_bar*Y_bar*Z + X*Y.
Question 32
Topic: Microprocessors / Computer Organization
If the memory chip size is 256*1 bits, then the number of chips required to make up 1 K bytes of memory is
Answer: A. 32
Explanation: 1 K byte of memory = 1024 bytes = 1024 * 8 bits. The size of one memory chip is 256 bits (256 * 1). The number of chips required is total capacity divided by single chip capacity: (1024 * 8) / 256 = 4 * 8 = 32 chips.
Question 33
Topic: Digital Circuits
Given the decimal number -19, an eight bit two's complement representation is given by
- A. 11101110
- B. 11101101
- C. 11101100
- D. None of these
Answer: B. 11101101
Explanation: The 8-bit binary representation of +19 is 00010011. To find the two's complement for -19, first take the one's complement by inverting all bits (11101100), then add 1 to the LSB: 11101100 + 1 = 11101101.
Question 34
Topic: Digital Circuits
The function shown in the figure when simplified will yield a result with (A 4-variable K-map showing an irregular checkerboard pattern with 8 ones)
- A. 2 terms
- B. 4 terms
- C. 7 terms
- D. 16 terms
Answer: C. 7 terms
Explanation: Looking at the K-map provided in the paper, the placement of the 1s does not allow for heavy grouping (most terms cannot be combined into large blocks). Based on standard simplification for the given configuration, the optimal sum-of-products yields a 7-term expression.
Question 35
Topic: Digital Circuits
The logic circuit given below converts a binary code Y1 Y2 Y3 into (Circuit connects Y1 to X1, Y1 XOR Y2 to X2, Y2 XOR Y3 to X3)
- A. Excess-3 code
- B. Gray code
- C. BCD code
- D. Hamming code
Answer: B. Gray code
Explanation: The circuit describes the standard binary-to-Gray code conversion algorithm. The most significant bit is kept the same (X1 = Y1), and each subsequent Gray code bit is generated by XORing adjacent binary bits (X2 = Y1 XOR Y2; X3 = Y2 XOR Y3).
Question 36
Topic: Digital Circuits
A 4-bit synchronous counter uses flip-flops with propagation delay time of 25 ns each. The maximum possible time required for change of state will be
- A. 25 ns
- B. 50 ns
- C. 75 ns
- D. 100 ns
Answer: A. 25 ns
Explanation: In a synchronous counter, the clock pulse is applied simultaneously to all flip-flops. Therefore, the state of all flip-flops changes concurrently, and the maximum time required for the counter state to change is simply the propagation delay of a single flip-flop, which is 25 ns.
Question 37
Topic: Electromagnetics
An electromagnetic wave incident on a perfect conductor is
- A. Entirely reflected
- B. Fully transmitted
- C. Partially transmitted
- D. None of these
Answer: A. Entirely reflected
Explanation: A perfect conductor has infinite conductivity. The skin depth is zero, meaning electromagnetic waves cannot penetrate into the conductor. Thus, the incident wave is entirely reflected.
Question 38
Topic: Electromagnetics
The characteristic impedance of a lossless transmission line is given by
- A. Z = $\sqrt{LC}$
- B. Z = $\sqrt{C/L}$
- C. Z = LC
- D. Z = $\sqrt{L/C}$
Answer: D. Z = $\sqrt{L/C}$
Explanation: For a transmission line, the characteristic impedance Z0 = $\sqrt{(R + jwL}$ / (G + jwC)). For a lossless line, the resistance (R) and conductance (G) are zero. Thus, Z0 simplifies to $\sqrt{jwL / jwC}$ = $\sqrt{L / C}$.
Question 39
Topic: Electromagnetics
A lossless line of 50 ohms is terminated in a load of 100 ohms resistive. The VSWR is
Answer: B. 2:1
Explanation: The reflection coefficient (Gamma) is (ZL - Z0) / (ZL + Z0) = (100 - 50) / (100 + 50) = 50 / 150 = 1/3. The Voltage Standing Wave Ratio (VSWR) is (1 + |Gamma|) / (1 - |Gamma|) = (1 + 1/3) / (1 - 1/3) = (4/3) / (2/3) = 2, which is conventionally written as a 2:1 ratio.
Question 40
Topic: Electromagnetics
Which of the following does not exist in waveguides
- A. TE waves
- B. TM waves
- C. TE waves and TM waves
- D. TEM waves
Answer: D. TEM waves
Explanation: Transverse Electromagnetic (TEM) waves require two separate conductors (an inner and an outer conductor, like in a coaxial cable) to propagate, as they need a return path for current at DC frequencies. A standard single-conductor hollow waveguide cannot support TEM waves.
Question 41
Topic: Communication Systems
Two carriers of 2 GHz and 4 GHz respectively are frequency modulated by a signal of 10 kHz, such that bandwidth of the FM signal in the two cases are same. The peak deviation in the two cases are in the ratio of
Answer: D. 1:1
Explanation: According to Carson's rule, the bandwidth of an FM signal is BW = 2(Delta_f + fm), where Delta_f is the peak frequency deviation and fm is the modulating frequency. Since both the BW and fm (10 kHz) are the same for both signals, their peak deviations (Delta_f) must also be the same. The ratio is 1:1.
Question 42
Topic: Communication Systems
The bandwidth required for QPSK modulated channel is
- A. Twice the BW of BPSK
- B. Equal to BPSK
- C. Equal to FSK
- D. Half of the BW of BPSK
Answer: D. Half of the BW of BPSK
Explanation: Quadrature Phase Shift Keying (QPSK) transmits 2 bits per symbol, while Binary Phase Shift Keying (BPSK) transmits 1 bit per symbol. For the same total bit rate, the symbol rate in QPSK is halved, meaning the required transmission bandwidth is half that of BPSK.
Question 43
Topic: Microwave Engineering
Magic T is
- A. Four port junction
- B. Two port junction
- C. Three port junction
- D. It is not junction
Answer: A. Four port junction
Explanation: A Magic T, also known as a hybrid tee, is a combination of an H-plane tee and an E-plane tee in a waveguide setup. It features four ports: one H-plane port, one E-plane port, and two collinear ports.
Question 44
Topic: Microwave Engineering
Duplexer is made of
- A. Only receive filter
- B. Only transmit filter
- C. Only circulator
- D. Both receive filter and transmit filter
Answer: D. Both receive filter and transmit filter
Explanation: A duplexer is a device that allows a transmitter and a receiver to share the same antenna while operating at different frequencies. It generally consists of both a transmit filter and a receive filter to ensure proper isolation.
Question 45
Topic: Electromagnetics
The gain G of an antenna of effective area A is given by
- A. G = 4*pi*lambda/A²
- B. G = 4*pi*A/lambda
- C. G = 4*pi*A/lambda²
- D. None
Answer: C. G = 4*pi*A/lambda²
Explanation: The relationship between the maximum gain (G) of an antenna and its effective aperture area (A) is given by the formula G = (4 * pi * A) / lambda², where lambda is the operating wavelength.
Question 46
Topic: Electromagnetics
If the short circuit and open circuit impedance of line are 5 and 20 respectively the characteristic impedance is given by
- A. 100 Ω
- B. 10 Ω
- C. 15 Ω
- D. 10000 Ω
Answer: B. 10 Ω
Explanation: The characteristic impedance of a transmission line can be found using the geometric mean of its open-circuit and short-circuit impedances: $Z_{0}=\sqrt{Z_{OC}\cdot Z_{SC}}$. Substituting the given values, $Z_{0}=\sqrt{20\times5}=\sqrt{100}=10~\Omega$.
Question 47
Topic: Electromagnetics
The input impedance of short circuited line of length l where $\frac{\lambda}{4}<l<\frac{\lambda}{2}$ is
- A. Capacitive
- B. Inductive
- C. Resistive
- D. None of these
Answer: A. Capacitive
Explanation: For a short-circuited lossless transmission line, the input impedance is $Z_{in}=jZ_{0}\tan(\beta l)$. Since $\beta=2\pi/\lambda$, the given length range $\lambda/4<l<\lambda/2$ corresponds to $\pi/2<\beta l<\pi$. In this second quadrant, the tangent function is negative, making the input impedance purely capacitive.
Question 48
Topic: Communication Systems
Maximum coding gain in
- A. Block codes
- B. Convolution codes
- C. Turbo codes
- D. RS codes
Answer: C. Turbo codes
Explanation: Among the given error-correcting codes, Turbo codes (along with Low-Density Parity-Check codes) provide the maximum coding gain as they can achieve performance very close to the theoretical Shannon limit.
Question 49
Topic: Analog Circuits
Noise figure of an amplifier depends on
- A. Bandwidth
- B. Output power
- C. Power input
- D. None of the above
Answer: D. None of the above
Explanation: The Noise Figure (NF) is a measure of degradation of the Signal-to-Noise Ratio (SNR) caused by components in a signal chain. It is an intrinsic property of the amplifier determined by its internal components and operating temperature, not by the input/output signal power or the channel bandwidth.
Question 50
Topic: Communication Systems
BCH code belongs to
- A. Block codes
- B. Convolution codes
- C. Turbo codes
- D. None of the above
Answer: A. Block codes
Explanation: BCH (Bose-Chaudhuri-Hocquenghem) codes are a prominent and powerful class of cyclic error-correcting block codes.
Question 51
Topic: Communication Systems
When a carrier is phase modulated, with an integrated modulating signal, the resultant is
- A. Phase modulated signal
- B. Frequency modulated signal
- C. Amplitude modulated signal
- D. QPSK modulated signal
Answer: B. Frequency modulated signal
Explanation: Frequency modulation (FM) and phase modulation (PM) are closely related. If the message signal is integrated before being applied to a phase modulator, the instantaneous frequency (which is the derivative of the phase) becomes proportional to the original message signal, resulting in Frequency Modulation.
Question 52
Topic: Communication Systems
A satellite orbiting in 600 km orbit transmits 5 GHz frequency. The Doppler shift observed at the ground station, when the satellite is over head of the station is
- A. Zero
- B. Maximum
- C. Infinity
- D. None of the above
Answer: A. Zero
Explanation: Doppler shift is proportional to the relative radial velocity between the transmitter and the receiver. When the satellite is exactly overhead, its motion is purely tangential to the ground station, meaning the radial velocity is zero. Consequently, the Doppler shift observed at that instant is zero (Note: The provided source key incorrectly listed 'Maximum', but physics dictates it is zero).
Question 53
Topic: Communication Systems
A communication channel disturbed by additive white Gaussian noise has a bandwidth of 4 kHz and SNR of 15. The highest transmission rate that such a channel can support (in k-bits/sec) is
Answer: A. 16
Explanation: According to Shannon's channel capacity theorem, $C=B\log_{2}(1+SNR)$. Substituting the values, $C=4\log_{2}(1+15)=4\log_{2}(16)=4\times4=16$ kbps.
Question 54
Topic: Microwave Engineering
A dual directional coupler is connected in a microwave reflectometer measurement setup. The reading of the power meter in the forward direction is 100 mw and in the reverse direction 4 mw. The VSWR is
Answer: C. 1.5
Explanation: The magnitude of the reflection coefficient is $|\rho|=\sqrt{P_{r}/P_{i}}=\sqrt{4/100}=2/10=0.2$. The Voltage Standing Wave Ratio is given by $VSWR=\frac{1+|\rho|}{1-|\rho|}=\frac{1+0.2}{1-0.2}=\frac{1.2}{0.8}=1.5$.
Question 55
Topic: Analog Circuits
Linear amplifier with a gain of 30 dB is fed with 1.0 µW power, the output power of the amplifier
- A. 1.0 W
- B. 0 dBm
- C. 30 dBm
- D. - 30 dBm
Answer: B. 0 dBm
Explanation: First, convert the input power to dBm: $1.0~\mu\text{W}=10^{-6}\text{W}=-30\text{dBm}$. The output power is the input power plus the gain in dB: $P_{out}=-30\text{dBm}+30\text{dB}=0\text{dBm}$.
Question 56
Topic: Communication Systems
10 Watts RF power is transmitted with a circular polarized antenna having gain of 10 dB. A receiving antenna has vertical polarization. The path loss is 100 dB. The receiving signal is
- A. - 83 dBW
- B. - 80 dBW
- C. - 86 dBW
- D. + 80 dBW
Answer: A. - 83 dBW
Explanation: Transmit power $P_{t}=10\text{W}=10\text{dBW}$. Transmit gain $G_{t}=10\text{dB}$. The path loss is $100\text{dB}$. Because there is a mismatch between a circularly polarized transmitting antenna and a linearly (vertically) polarized receiving antenna, there is a polarization loss of 3 dB. Received power $P_{r}=P_{t}+G_{t}-L_{path}-L_{pol}=10+10-100-3=-83\text{dBW}$.
Question 57
Topic: Engineering Mathematics
$\vec{p}=2i-3j$, $\vec{Q}=-3i+4j-2k$ and $\vec{R}$ are in equilibrium, if $\vec{R}$ is
- A. $-i-j+2k$
- B. $i-j+2k$
- C. $i+j+2k$
- D. $i-j-2k$
Answer: B. $i-j+2k$
Explanation: For the vectors to be in equilibrium, their sum must be zero: $\vec{p}+\vec{Q}+\vec{R}=0$. Therefore, $\vec{R}=-(\vec{p}+\vec{Q})=-((2-3)i+(-3+4)j+(0-2)k)=-(-i+j-2k)=i-j+2k$.
Question 58
Topic: Engineering Mathematics
A rigid body is rotating with constant angular velocity $\omega$ about a fixed axis, if v is the velocity of a point of the body, then curl $v=$
- A. $\omega$
- B. $\omega^{2}$
- C. $2\omega$
- D. $2\omega^{2}$
Answer: C. $2\omega$
Explanation: The velocity vector of a point on the rigid body is given by $\vec{v}=\vec{\omega}\times\vec{r}$. Taking the curl of the velocity field yields $\nabla\times\vec{v}=\nabla\times(\vec{\omega}\times\vec{r})$. Since the angular velocity $\vec{\omega}$ is constant, this resolves to $2\vec{\omega}$, making the magnitude $2\omega$.
Question 59
Topic: Engineering Mathematics
Laplace transform of $\sin^{3} 2t$ is
- A. $\frac{24}{(s^{2}+4)(s^{2}+36)}$
- B. $\frac{1}{(s^{2}+4)(s^{2}+64)}$
- C. $\frac{48}{(s^{2}+4)(s^{2}+36)}$
- D. $\frac{64}{(s^{2}+4)(s^{2}+36)}$
Answer: C. $\frac{48}{(s^{2}+4)(s^{2}+36)}$
Explanation: Using the trigonometric identity $\sin^{3}\theta=\frac{1}{4}(3\sin\theta-\sin 3\theta)$, we have $\sin^{3}(2t)=\frac{1}{4}(3\sin 2t-\sin 6t)$. Taking the Laplace transform: $L\{\sin^{3}(2t)\}=\frac{1}{4}\left(\frac{3\times2}{s^{2}+4}-\frac{6}{s^{2}+36}\right)$. Simplifying this gives $\frac{6}{4}\left(\frac{s^{2}+36-(s^{2}+4)}{(s^{2}+4)(s^{2}+36)}\right)=\frac{6}{4}\times\frac{32}{(s^{2}+4)(s^{2}+36)}=\frac{48}{(s^{2}+4)(s^{2}+36)}$.
Question 60
Topic: Engineering Mathematics
The value of the determinant $\begin{vmatrix}\cos~\theta & 0 & \sin~\theta \\ 0 & 1 & 0 \\ -\sin~\theta & 0 & \cos~\theta\end{vmatrix}$ is
Answer: C. 1
Explanation: Expanding the determinant along the second row gives $1\times(\cos\theta\cdot\cos\theta-\sin\theta\cdot(-\sin\theta))$. This simplifies to $\cos^{2}\theta+\sin^{2}\theta$, which is equal to 1 based on standard trigonometric identities.
Question 61
Topic: Engineering Mathematics
Solution of $(D^{2}+4)y=\sin^{2}x$ is
- A. $y=A~\cos2x+B~\sin2x-\frac{1}{8}-\frac{x}{8}\sin~2x$
- B. $y=A~\cos2x+B~\sin~2x+\frac{1}{8}+\frac{x}{8}\sin~2x$
- C. $y=A~\cos2x+B~\sin2x-\frac{1}{8}+\frac{x}{8}\sin~2x$
- D. $y=A~\cos2x+B~\sin2x+\frac{1}{8}-\frac{x}{8}\sin~2x$
Answer: D. $y=A~\cos2x+B~\sin2x+\frac{1}{8}-\frac{x}{8}\sin~2x$
Explanation: The particular solution is given by $\frac{1}{D^{2}+4}[\frac{1-\cos 2x}{2}]$. This evaluates to $\frac{1}{2}[\frac{1}{D^{2}+4}\cdot e^{0x}-\frac{1}{D^{2}+4}\cos 2x] = \frac{1}{8}-\frac{x}{4}\frac{\sin 2x}{2} = \frac{1}{8}-\frac{x}{8}\sin 2x$. The general solution is the sum of the complementary function $A \cos 2x + B \sin 2x$ and the particular solution.
Question 62
Topic: Engineering Mathematics
The value of k for which the lines $2x+y-1=0$, $4x+3y-3=0$ and $3x+ky-2=0$, are concurrent is
Answer: C. 2
Explanation: For lines to be concurrent, the determinant of their coefficients must be zero. Evaluating the determinant of the $3\times3$ matrix of coefficients gives $2(-6+3k)-1(-8+9)-1(4k-9)=0$. This simplifies to $2k-4=0$, which yields $k=2$.
Question 63
Topic: Engineering Mathematics
A box contains 5 black and 5 red balls. Two balls are randomly picked one after another from the box, without replacement. The probability for both balls being red is
- A. $\frac{1}{90}$
- B. $\frac{1}{5}$
- C. $\frac{19}{90}$
- D. $\frac{2}{9}$
Answer: D. $\frac{2}{9}$
Explanation: The probability for both balls being red is calculated by multiplying the probability of picking a red ball first by the probability of picking a second red ball: $\frac{5}{10} \times \frac{4}{9} = \frac{20}{90} = \frac{2}{9}$.
Question 64
Topic: Engineering Mathematics
$x^{3}+x~\sin~x$ is
- A. Constant function
- B. Odd function
- C. Even function
- D. Periodic function
Answer: A. Constant function
Explanation: $f(x)=x^{3}+x~\sin~x$. Evaluating $f(-x)$ shows it is neither an even nor an odd function. Furthermore, a periodic + nonperiodic function is always nonperiodic. The source text concludes it as a 'constant function' based on eliminating the provided alternatives, although mathematically it represents a general non-periodic function.
Question 65
Topic: Engineering Mathematics
$\int\frac{dx}{x\sqrt{x^{2}-a^{2}}}$ is
- A. $\frac{1}{a}\text{cosec}^{-1}(\frac{x}{a})$
- B. $\frac{1}{a}\sin^{-1}(\frac{x}{a})$
- C. $\frac{1}{a}\cos^{-1}(\frac{x}{a})$
- D. $\frac{1}{a}\sec^{-1}(\frac{x}{a})$
Answer: D. $\frac{1}{a}\sec^{-1}(\frac{x}{a})$
Explanation: By standard integration formulas, the integral of $\frac{1}{x\sqrt{x^{2}-a^{2}}}$ with respect to $x$ is equal to $\frac{1}{a}\sec^{-1}(\frac{x}{a})$.
Question 66
Topic: Engineering Mathematics
Eigen values of $\begin{bmatrix}-5&2\\ 2&-2\end{bmatrix}$ are
- A. -6, -1
- B. 6, -1
- C. -6, 1
- D. 6, 1
Answer: A. -6, -1
Explanation: The characteristic equation is given by $\det(A-\lambda I)=0$. This becomes $(-5-\lambda)(-2-\lambda)-4=0$, which simplifies to $\lambda^{2}+7\lambda+6=0$. Factoring this gives $(\lambda+6)(\lambda+1)=0$, leading to the eigenvalues $\lambda = -1, -6$.
Question 67
Topic: Network Theory
The approximate equivalent resistance at the points $X_{1}$ and $X_{2}$ in the circuit shown in below (A ladder network with series 10 $\Omega$ resistors and parallel 40 $\Omega$ resistors)
- A. 60 $\Omega$
- B. 40 $\Omega$
- C. 80 $\Omega$
- D. 20 $\Omega$
Answer: B. 40 $\Omega$
Explanation: Evaluating the resistive ladder network starting from the far right end, the series and parallel combinations simplify step-by-step. The equivalent resistance across the input terminals $X_{1}$ and $X_{2}$ is 40 $\Omega$.
Question 68
Topic: Network Theory
An inductor supplied with 50 V ac with a frequency of 10 kHz passes a current of 7.96 mA. The value of inductor is
- A. 1 mH
- B. 10 mH
- C. 100 mH
- D. 1 H
Answer: C. 100 mH
Explanation: Using the relation $V=IX_{L}$, we get $50 = 7.96\times10^{-3} \times 2\pi \times 10^{4} \times L$. Solving for L gives $L = 99.97\text{ mH}$, which is approximately 100 mH.
Question 69
Topic: Electromagnetics
In a capacitor, the electric charge is stored in
- A. Dielectric
- B. Metal plates
- C. Dielectric as well as metal plates
- D. Neither dielectric nor metal plates
Answer: B. Metal plates
Explanation: In a capacitor, the electric charge itself accumulates on the conductive metal plates, while the energy is stored within the electric field in the dielectric medium.
Question 70
Topic: Analog Circuits
Oscillator requires
- A. No feedback
- B. Negative feedback
- C. Positive feedback
- D. Either positive or negative feedback
Answer: C. Positive feedback
Explanation: An oscillator requires positive feedback to satisfy the Barkhausen criterion, ensuring the loop gain is unity and the phase shift is zero (or an integer multiple of $360^\circ$) to sustain continuous oscillations.
Question 71
Topic: Electrical Machines
Which loss in a transformer varies significantly with load?
- A. Hysteresis loss
- B. Eddy current loss
- C. Copper loss
- D. Core loss
Answer: C. Copper loss
Explanation: Copper losses ($I^{2}R$ losses) depend directly on the square of the current flowing through the transformer windings, making them highly dependent on the load.
Question 72
Topic: Network Theory
The resistance of a parallel circuit consisting of two resistors is 12 $\Omega$. One of the resistance wires breaks and the effective resistance becomes 18 $\Omega$. The resistance of the broken wire is
- A. 48 $\Omega$
- B. 18 $\Omega$
- C. 36 $\Omega$
- D. 24 $\Omega$
Answer: C. 36 $\Omega$
Explanation: For two resistors in parallel, $\frac{1}{R_{1}} + \frac{1}{R_{2}} = \frac{1}{12}$. If one breaks (say $R_{2}$ is left), the effective resistance is 18 $\Omega$, so $R_{2} = 18 \Omega$. Substituting this back gives $\frac{1}{R_{1}} = \frac{1}{12} - \frac{1}{18} = \frac{1}{36}$. Thus, $R_{1} = 36 \Omega$.
Question 73
Topic: Network Theory
Time constant of a series R-L circuit equals
- A. L/R second
- B. LR second
- C. $L^{2}R$
- D. $LR^{2}$
Answer: A. L/R second
Explanation: The time constant ($\tau$) for a series R-L circuit is defined as the ratio of inductance to resistance, $\tau = \frac{L}{R}$ seconds.
Question 74
Topic: Network Theory
A dc voltage V is applied at time $t=0$ to a series RC circuit. The steady state current is
- A. $V/R$
- B. $V/C$
- C. $\frac{V}{\sqrt{R^{2}+C^{2}}}$
- D. Zero
Answer: D. Zero
Explanation: For an RC circuit, the current response to a DC step is $i(t)=\frac{V}{R}e^{-t/RC}$. In the steady state ($t \to \infty$), the capacitor is fully charged and acts as an open circuit, making the current zero.
Question 75
Topic: Network Theory
The given circuit represents a (T-network with series capacitors 2C and a shunt inductor L)
- A. Low pass filter
- B. High pass filter
- C. Band pass filter
- D. Band stop filter
Answer: B. High pass filter
Explanation: The series capacitors block low-frequency signals and pass high frequencies, while the shunt inductor provides a low-impedance path to ground for low frequencies. This configuration operates as a high pass filter.
Question 76
Topic: Analog Circuits
The very low frequency gain of the low pass filter shown in the given figure is (Op-amp with input resistor 1 k$\Omega$ and feedback loop of 100 k$\Omega$ parallel with 0.01 $\mu$F capacitor)
- A. 10 dB
- B. 20 dB
- C. 30 dB
- D. 40 dB
Answer: D. 40 dB
Explanation: At very low frequencies, the feedback capacitor acts as an open circuit. The gain magnitude of this inverting amplifier is $A_{f} = |-\frac{R_{f}}{R_{1}}| = |\frac{100\text{k}}{1\text{k}}| = 100$. Converting to decibels: $20 \log_{10}(100) = 40 \text{ dB}$.
Question 77
Topic: Network Theory
The time-constant of the network shown in the figure is (Two parallel branches, each with a resistor R and capacitor C arranged to form an equivalent circuit)
- A. CR
- B. 2 CR
- C. CR/4
- D. CR/2
Answer: A. CR
Explanation: The circuit simplifies to an equivalent resistance $R_{eq}=\frac{R}{2}$ and equivalent capacitance $C_{eq}=2C$. The time constant is the product of these equivalent values: $R_{eq}C_{eq} = \frac{R}{2} \cdot 2C = RC$.
Question 78
Topic: Network Theory
For the circuit shown below the current I flowing through the circuit will be (A 2V source across three 3 $\Omega$ resistors configured in parallel)
- A. 1/2 A
- B. 1 A
- C. 2 A
- D. 4 A
Answer: C. 2 A
Explanation: The bridge-like structural layout of the resistors forms three parallel branches. The equivalent resistance is $R_{eq} = 3 || 3 || 3 = 1 \Omega$. The total current drawn from the 2 V source is $I = \frac{V}{R_{eq}} = \frac{2}{1} = 2 \text{ A}$.
Question 79
Topic: Network Theory
When L is doubled and C is halved, the resonance frequency of series tuned circuit becomes
- A. Doubled
- B. Halved
- C. One quarter
- D. Unchanged
Answer: D. Unchanged
Explanation: The resonance frequency of a series tuned circuit is $f_{r}=\frac{1}{2\pi\sqrt{LC}}$. If L becomes $2L$ and C becomes $\frac{C}{2}$, the product $LC$ remains unchanged, thus the resonance frequency stays unchanged.
Question 80
Topic: Network Theory
In a series resonant circuit, with the increase in L
- A. Resonant frequency will decrease
- B. Bandwidth will decrease
- C. Q will increase
- D. All of these
Answer: D. All of these
Explanation: With an increase in inductance L: (1) Resonant frequency $f_{r} = \frac{1}{2\pi\sqrt{LC}}$ decreases. (2) Bandwidth $\frac{R}{L}$ decreases. (3) Quality factor $Q = \frac{1}{R}\sqrt{\frac{L}{C}}$ increases. Therefore, all the given statements are correct.