Topic: Digital Circuits
A pulse train with a frequency of 1 MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is
- A. 100 n sec
- B. 50 n sec
- C. 20 n sec
- D. 10 n sec
Answer: A. 100 n sec
Explanation: For a ripple counter with N stages, the maximum operating frequency f_max = 1 / (N * t_pd). A modulo-1024 counter requires 10 flip-flops (since 2^10 = 1024), so N = 10. Thus, t_pd = 1 / (N * f_max) = 1 / (10 * 10^6) = 10^-7 seconds = 100 nsec.