ISRO Electronics & Communication (ECE) 2006 - Question 36

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Topic: Digital Circuits

A 4-bit synchronous counter uses flip-flops with propagation delay time of 25 ns each. The maximum possible time required for change of state will be

  • A. 25 ns
  • B. 50 ns
  • C. 75 ns
  • D. 100 ns

Answer: A. 25 ns

Explanation: In a synchronous counter, the clock pulse is applied simultaneously to all flip-flops. Therefore, the state of all flip-flops changes concurrently, and the maximum time required for the counter state to change is simply the propagation delay of a single flip-flop, which is 25 ns.

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