Topic: Digital Circuits
In a digital circuit the set-up time violation can be fixed by
- A. Increasing the clock frequency
- B. Increasing the delay of data path logic
- C. Slowing the clock frequency
- D. None of the above
Answer: C. Slowing the clock frequency
Explanation: A setup time violation occurs when the combinational data path takes too long to stabilize before the next active clock edge. Slowing down the clock frequency increases the clock period, providing more time for the data to propagate and satisfy the setup requirements.