Topic: Digital Circuits
The 4:1 Multiplexer implemented with data inputs $I_0 = 0, I_1 = \overline{A}, I_2 = A, I_3 = 1$ and select lines $S_1 = B, S_0 = C$ implements
- A. $\Sigma(1, 6, 3, 7)$
- B. $\Sigma(1, 2, 5, 7)$
- C. $\Sigma(2, 3, 4, 5)$
- D. $\Sigma(1, 3, 4, 7)$
Answer: A. $\Sigma(1, 6, 3, 7)$
Explanation: The output of a 4-to-1 MUX is $Y = \overline{S}_1 \overline{S}_0 I_0 + \overline{S}_1 S_0 I_1 + S_1 \overline{S}_0 I_2 + S_1 S_0 I_3$. Substituting the inputs: $Y = \overline{B}\overline{C}(0) + \overline{B}C(\overline{A}) + B\overline{C}(A) + BC(1)$. Expanding this gives $Y = \overline{A}\overline{B}C + AB\overline{C} + BC(\overline{A} + A) = \overline{A}\overline{B}C + AB\overline{C} + \overline{A}BC + ABC$. These correspond to minterms 1, 6, 3, and 7, meaning $Y = \Sigma(1, 3, 6, 7)$.