ISRO Electronics & Communication (ECE) 2017-2 - Question 29

All ISRO Electronics & Communication (ECE) papers | ISRO Electronics & Communication (ECE) 2017-2

Topic: Digital Electronics

The CMOS circuit shown below implements the function

  • A. $(A+B)C+D$
  • B. $(AB+C)+D$
  • C. $\overline{(A+B)C+D}$
  • D. $(AB+C)D$

Answer: C. $\overline{(A+B)C+D}$

Explanation: In the pull-down network, transistors A and B are in parallel, which are in series with C, and this entire combination is in parallel with D. Since CMOS logic inherently implements the inverted output, the function is $Y = \overline{(A+B)C+D}$.

| | All questions of ISRO Electronics & Communication (ECE) 2017-2