Topic: Digital Electronics
An 8 bit ripple counter and an 8 bit synchronous counter are made using flip flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then
- A. $R=10\text{ ns}, S=80\text{ ns}$
- B. $R=40\text{ ns}, S=10\text{ ns}$
- C. $R=10\text{ ns}, S=10\text{ ns}$
- D. $R=80\text{ ns}, S=10\text{ ns}$
Answer: D. $R=80\text{ ns}, S=10\text{ ns}$
Explanation: In an 8 bit ripple counter, the clock is applied to the first flip-flop only and remaining flip-flops receive the clock from their previous flip-flop. So it requires $8 \times 10\text{ ns} = 80\text{ ns}$. In a synchronous counter, the clock is applied simultaneously to all F/Fs, so the output is obtained after one clock pulse only i.e., $1 \times 10\text{ ns} = 10\text{ ns}$.