ISRO Electronics & Communication (ECE) 2014 - Question 4

All ISRO Electronics & Communication (ECE) papers | ISRO Electronics & Communication (ECE) 2014

Topic: Digital Electronics

Which type of timing violation will occur, If a digital IC is operated at clock frequency which is higher than its specified maximum clock frequency?

  • A. Hold violation
  • B. Setup violation
  • C. Propagation delay
  • D. All of above

Answer: B. Setup violation

Explanation: Based on the official answer key, the correct option is (b). Operating at a higher clock frequency reduces the clock period, making it difficult for the data to arrive and stabilize before the next active clock edge, resulting in a setup time violation.

| | All questions of ISRO Electronics & Communication (ECE) 2014