ISRO Electronics & Communication (ECE) 2009 - Question 52

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Topic: Electronics Engineering

The theoretical dividing line between Reduced Instruction Set Computing (RISC) microprocessor and Complex Instructions Set Computing (CISC) microprocessor is

  • A. Instruction execution rate to be one instruction per clock cycle
  • B. Number of address and data lines
  • C. Number of pins in the chip
  • D. None of the above

Answer: A. Instruction execution rate to be one instruction per clock cycle

Explanation: Detailed standard solution.

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