ISRO Computer Science (CSE) 2025 - Question 55

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Topic: Digital Logic

In order to get low output from the following logic circuit, the possible inputs are
[Logic circuit showing A and B as inputs to a NAND gate. The output of the NAND gate and C are inputs to an OR gate. The final output is Y]

Figure for question 55, ISRO Computer Science (CSE) 2025

  • A. A-1, B-1, C-0
  • B. A-1, B-1, C-1
  • C. A-0, B-0, C-1
  • D. A-0, B-0, C-0

Answer: A. A-1, B-1, C-0

Explanation: From the schematic, the boolean expression for the circuit is $Y = \overline{(A \cdot B)} + C$.
We want a low output, so $Y = 0$.
For an OR gate to output 0, both of its inputs must be 0. Thus, $\overline{(A \cdot B)} = 0$ AND $C = 0$.
$\overline{(A \cdot B)} = 0 \implies A \cdot B = 1 \implies A = 1$ AND $B = 1$.
Therefore, the required inputs are A=1, B=1, C=0.

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