ISRO Electronics & Communication (ECE) 2017 - Question 79

All ISRO Electronics & Communication (ECE) papers | ISRO Electronics & Communication (ECE) 2017

Topic: Digital Circuits

The circuit is formed as shown below. The output S and C implement (Logic diagram with inputs A, B, two NOT gates, two AND gates, and an OR gate)

  • A. Two bit adder with sum and carry respectively
  • B. Two bit subtractor with sum and borrow respectively
  • C. $S = \overline{A}B + A\overline{B}; C = \overline{A}B$
  • D. None of the above

Answer: C. $S = \overline{A}B + A\overline{B}; C = \overline{A}B$

Explanation: The logic circuit evaluates to $S = A\overline{B} + \overline{A}B$ (which is the XOR operation for the difference) and $C = \overline{A}B$ (which is the borrow operation). This logic specifically implements a half subtractor, and the exact boolean expressions for it correspond to option (c).

| | All questions of ISRO Electronics & Communication (ECE) 2017