Topic: Digital Circuits
The state transition diagram for a sequence generator is shown in Figure. It is designed using D F/Fs and combinational logic blocks $L_{1}$, $L_{2}$ and $L_{3}$ and is initialized at $(Q_{2}=1, Q_{1}=0, Q_{0}=1)$. The minimized expressions for $O_{0}$, $O_{1}$ and $O_{2}$ are
- A. $O_{2}=Q_{2}; O_{1}=Q_{1}; Q_{0}=Q_{0}$
- B. $O_{2}=Q_{1}\cdot\overline{Q}_{0};O_{1}=\overline{Q}_{0}\cdot Q_{1}\cdot\overline{Q}_{2}+Q_{0}\cdot\overline{Q}_{1}\cdot Q_{2}; O_{0}=\overline{Q}_{0}\cdot Q_{1}\cdot Q_{2}$
- C. $O_{2}=Q_{1};O_{1}=Q_{0}+\overline{Q}_{2};O_{0}=Q_{1}\cdot Q_{2}$
- D. None of above
Answer: C. $O_{2}=Q_{1};O_{1}=Q_{0}+\overline{Q}_{2};O_{0}=Q_{1}\cdot Q_{2}$
Explanation: From the state transition diagram, writing the present state and next state equations and solving the K-maps for inputs $D_2, D_1, D_0$ gives $D_2 = Q_1$, $D_1 = \overline{Q}_2 + Q_0$, and $D_0 = Q_2 Q_1$.