ISRO Electronics & Communication (ECE) 2017 - Question 21

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Topic: Analog Circuits

A ramp signal ($V_t$: 0 to 5V with period 100 $\mu$s) is compared with a Soft-Start Signal provided by an N-channel MOSFET ($Q_1$). If $Q_1$ has a low threshold voltage of 0.7 V, negligible ON resistance, and is driven by an RC network (R = 100 k$\Omega$, C = 1 nF) connected to a 5V source, what is the duty cycle of the output signal of the comparator after 100 $\mu$s?

  • A. 17.4%
  • B. 34.8%
  • C. 0%
  • D. 50%

Answer: B. 34.8%

Explanation: The MOSFET gate voltage is governed by the RC charging equation $V_G = 5(1 - e^{-t/\tau})$, where $\tau = RC = 100\text{ }\mu\text{s}$. The MOSFET turns ON when $V_G > 0.7\text{ V}$, which occurs at $t = 15\text{ }\mu\text{s}$. After $100\text{ }\mu\text{s}$, the MOSFET is fully ON, fixing the non-inverting terminal of the comparator at a steady-state voltage of 1.75 V. The comparator gives a positive logic output as long as the ramp voltage $V_t < 1.75\text{ V}$. Since the ramp goes from 0 to 5 V in $100\text{ }\mu\text{s}$, it reaches 1.75 V at $t = 35\text{ }\mu\text{s}$. Therefore, the signal is HIGH for 35 out of $100\text{ }\mu\text{s}$, yielding a duty cycle of $35\%$ (closest to option b, 34.8%).

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