ISRO Electronics & Communication (ECE) 2008 - Question 28

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Topic: Digital Electronics

A S-R flip flop with a clock input can be converted to a 'D' flip flop using

  • A. Two inverters
  • B. the flip flop output (Q & Q) connected to its inputs (S & R)
  • C. One inverter
  • D. Not possible

Answer: C. One inverter

Explanation: Logic diagram (conversion of S-R flip-flops to D flip-flop) involves using one inverter between the D input and the R input, with the D input directly connected to S.

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