Topic: Digital Electronics
In the following circuit, what sequence is followed by A and B on rising edge of CLK after reset is de-asserted?
(The circuit shows two D flip-flops. $D_1$ is connected to the output of an XOR gate. The XOR inputs are A (which is $\overline{Q}_2$) and B (which is $Q_1$). $D_2$ is connected to $Q_1$. They share a common CLK.)
- A. $AB=10, 11, 00, 10, 11, ...$
- B. $AB=10, 01, 00, 11, 10, ...$
- C. $AB=10, 00, 01, 10, 00, ...$
- D. $AB=11, 01, 00, 10, 11, ...$
Answer: A. $AB=10, 11, 00, 10, 11, ...$
Explanation: When the flip-flops are reset, $Q_1=0$ and $Q_2=0$, meaning $\overline{Q}_1=1$ and $\overline{Q}_2=1$.
$A = \overline{Q}_2$ and $B = Q_1$.
Initial state after reset: $A=1$, $B=0$ ($AB=10$).
$D_1 = A \oplus B = \overline{Q}_2 \oplus Q_1$, and $D_2 = Q_1$.
State 1: $D_1 = 1 \oplus 0 = 1$, $D_2 = 0$. After CLK, $Q_1=1$, $Q_2=0$. $A=\overline{Q}_2=1$, $B=Q_1=1$ ($AB=11$).
State 2: $D_1 = 1 \oplus 1 = 0$, $D_2 = 1$. After CLK, $Q_1=0$, $Q_2=1$. $A=\overline{Q}_2=0$, $B=Q_1=0$ ($AB=00$).
State 3: $D_1 = 0 \oplus 0 = 0$, $D_2 = 0$. After CLK, $Q_1=0$, $Q_2=0$. $A=\overline{Q}_2=1$, $B=Q_1=0$ ($AB=10$).
The sequence of AB is 10, 11, 00, 10, 11...