ISRO Computer Science (CSE) 2009 Question Paper & Solutions
Attempt the ISRO Computer Science (CSE) 2009 previous year paper in real CBT exam mode or practice mode with verified answers and explanations.
All ISRO Computer Science (CSE) papers
80 questions.
Question 1
The subnet mask for a particular network is 255.255.31.0. Which of the following pairs of IP addresses could belong to this network?
- A. 172.57.88.62 and 172.56.87.23
- B. 10.35.28.2 and 10.35.29.4
- C. 191.203.31.87 and 191.234.31.88
- D. 128.8.129.43 and 128.8.161.55
Answer: D. 128.8.129.43 and 128.8.161.55
Explanation: The mask 255.255.31.0 corresponds to binary 11111111.11111111.00011111.00000000. For two IPs to be on the same network, (IP AND Mask) must be identical. \nFor (d): \n129 (10000001) AND 31 (00011111) = 1. \n161 (10100001) AND 31 (00011111) = 1. \nBoth result in network 128.8.1.0.
Question 2
In networking, UTP stands for
- A. Unshielded T-connector port
- B. Unshielded twisted pair
- C. Unshielded terminating pair
- D. Unshielded transmission process
Answer: B. Unshielded twisted pair
Explanation: UTP stands for Unshielded Twisted Pair, a common type of cable used in telephone wiring and LANs.
Question 3
The address resolution protocol (ARP) is used for
- A. Finding the IP address from the DNS
- B. Finding the IP address of the default gateway
- C. Finding the IP address that corresponds to a MAC address
- D. Finding the MAC address that corresponds to an IP address
Answer: D. Finding the MAC address that corresponds to an IP address
Explanation: ARP resolves a known IP address to a physical MAC address.
Question 4
Which of the following is a MAC address?
- A. 192.166.200.50
- B. 00056A : 01A01A5CCA7FF60
- C. 568, Airport Road
- D. 01 : A5 : BB : A7 : FF : 60
Answer: D. 01 : A5 : BB : A7 : FF : 60
Explanation: A MAC address is a 48-bit address typically represented as 6 pairs of hexadecimal digits separated by colons.
Question 5
What is the primary purpose of a VLAN?
- A. Demonstrating the proper layout for a network
- B. Simulating a network
- C. To create a virtual private network
- D. Segmenting a network inside a switch or device
Answer: D. Segmenting a network inside a switch or device
Explanation: VLANs (Virtual Local Area Networks) are used to partition a physical network into logical segments.
Question 6
SHA-1 is a
- A. encryption algorithm
- B. decryption algorithm
- C. key exchange algorithm
- D. message digest function
Answer: D. message digest function
Explanation: SHA-1 (Secure Hash Algorithm 1) is a cryptographic hash function that produces a 160-bit hash value known as a message digest.
Question 7
Advanced Encryption Standard (AES) is based on
- A. Asymmetric key algorithm
- B. Symmetric key algorithm
- C. Public key algorithm
- D. Key exchange
Answer: B. Symmetric key algorithm
Explanation: AES is a symmetric-key algorithm, meaning the same key is used for both encrypting and decrypting the data.
Question 8
The primary purpose of an operating system is
- A. To make most efficient use of the computer hardware
- B. To allow people to use the computer
- C. To keep systems programmers employed
- D. To make computers easier to use
Answer: A. To make most efficient use of the computer hardware
Explanation: The primary goal of an OS is to manage hardware resources efficiently, although convenience is also a major goal.
Question 9
Which is the correct definition of a valid process transition in an operating system?
- A. Wake up : ready -> running
- B. Dispatch : ready -> running
- C. Block : ready -> running
- D. Timer runout : -> ready -> running
Answer: B. Dispatch : ready -> running
Explanation: Dispatching is the transition of a process from the Ready state to the Running state. 'Wake up' is Blocked->Ready. 'Block' is Running->Blocked. 'Timer runout' is Running->Ready.
Question 10
The correct matching of the following pairs is: A. Disk check B. Batch processing C. Time sharing D. Stack operation vs 1. Round robin 2. Scan 3. LIFO 4. FIFO
- A. A-3, B-4, C-2, D-1
- B. A-4, B-3, C-2, D-1
- C. A-3, B-4, C-1, D-2
- D. A-2, B-4, C-1, D-3
Answer: D. A-2, B-4, C-1, D-3
Explanation: Disk Check -> SCAN algorithm. Batch processing -> FIFO (First In First Out). Time sharing -> Round Robin. Stack -> LIFO.
Question 11
A page fault
- A. Occurs when a program accesses an available page on memory
- B. is an error in a specific page
- C. is a reference to a page belonging to another program
- D. occurs when a program accesses a page not currently in memory
Answer: D. occurs when a program accesses a page not currently in memory
Explanation: A page fault is an exception that occurs when a program tries to access a block of memory that is not stored in the physical memory (RAM).
Question 12
Using a larger block size in a fixed block size file system leads to
- A. better disk throughput but poorer disk space utilization
- B. better disk throughput and better disk space utilization
- C. poorer disk throughput but better disk space utilization
- D. poorer disk throughput and poorer disk space utilization
Answer: A. better disk throughput but poorer disk space utilization
Explanation: Larger blocks reduce the number of I/O operations (overhead) improving throughput, but increase internal fragmentation (wastage) for small files.
Question 13
Which of the following statements about synchronous and asynchronous I/O is NOT true?
- A. An ISR is invoked on completion of I/O in synchronous I/O but not in asynchronous I/O
- B. In both synchronous and asynchronous I/O, an ISR is invoked after completion of the I/O
- C. A process making a synchronous I/O call waits until I/O is complete
- D. In the case of synchronous I/O, the process waiting for the completion of I/O is woken up by the ISR
Answer: B. In both synchronous and asynchronous I/O, an ISR is invoked after completion of the I/O
Explanation: This question phrasing is tricky. Usually, interrupts (and ISRs) are used in both to signal completion. However, in synchronous I/O, the process waits. In asynchronous, it doesn't. The option claiming ISR is invoked in both is actually TRUE physically. ISRO key suggests (b), likely implying there's a difference in how the user process perceives it, or referring to polling vs interrupt.
Question 14
Consider three CPU-intensive processes, which require 10, 20 and 30 time units and arrive at times 0, 2 and 6, respectively. How many context switches are needed if the operating system implements a shortest remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end.
Answer: B. 2
Explanation: P1(10), P2(20), P3(30). Arrivals 0, 2, 6. \nT=0: P1 starts. \nT=2: P1 rem=8, P2=20. P1 continues. \nT=6: P1 rem=4, P2=20, P3=30. P1 continues. \nT=10: P1 ends. Switch to P2. (Context Switch 1). \nT=30: P2 ends. Switch to P3. (Context Switch 2). \nT=60: P3 ends. \nTotal switches = 2.
Question 15
The performance of Round Robin algorithm depends heavily on
- A. size of the process
- B. the I/O bursts of the process
- C. the CPU bursts of the process
- D. the size of the time quantum
Answer: D. the size of the time quantum
Explanation: If the time quantum is too large, it behaves like FCFS. If too small, context switch overhead dominates.
Question 16
Consider a system having "n" resources of same type. These resources are shared by 3 processes, A, B, C. These have peak demands of 3, 4, and 6 respectively. For what value of "n" deadlock won't occur
Answer: D. 13
Explanation: Deadlock condition: n < (3-1) + (4-1) + (6-1) + 1 = 11. If n >= 11, deadlock is impossible. 13 is a safe value.
Question 17
Consider a set of 5 processes... (P1, P2, P3, P4, P5 with Burst 10, 5, 3, 20, 2 and Priority 5, 2, 1, 4, 3). Lower number = Higher priority. Non-preemptive. Average waiting time?
- A. 12.8 ms
- B. 11.8 ms
- C. 10.8 ms
- D. 09.8 ms
Answer: C. 10.8 ms
Explanation: Execution Order: P2 (Arr 0, Prio 2 vs P1 Prio 5) -> P3 (Arr 2, Prio 1) -> P4 (Arr 5, Prio 4) -> P5 (Arr 10, Prio 3) -> P1 (Arr 0, Prio 5). \nTimeline: P2(0-5), P3(5-8), P4(8-28), P5(28-30), P1(30-40). \nWait times: P2=0, P3=5-2=3, P4=8-5=3, P5=28-10=18, P1=30-0=30. \nAvg = (0+3+3+18+30)/5 = 54/5 = 10.8 ms.
Question 18
The range of integers that can be represented by an n-bit 2's complement number system is
- A. -2^(n-1) to (2^(n-1) - 1)
- B. -(2^(n-1) - 1) to (2^(n-1) - 1)
- C. -2^(n-1) to 2^(n-1)
- D. -(2^(n-1) + 1) to (2^(n-1) - 1)
Answer: A. -2^(n-1) to (2^(n-1) - 1)
Explanation: Standard range for 2's complement. For n=8, -128 to 127.
Question 19
The switching expression corresponding to f(A, B, C, D) = Σ(1, 4, 5, 9, 11, 12) is
- A. BC'D' + A'C'D + AB'D
- B. ABC' + ACD + B'C'D
- C. ACD' + A'BC' + AC'D'
- D. A'BD + ACD' + BCD'
Answer: A. BC'D' + A'C'D + AB'D
Explanation: Simplification using K-Map yields BC'D' + A'C'D + AB'D.
Question 20
Consider the following boolean function of four variables f(w, x, y, z) = Σ(1, 3, 4, 6, 9, 11, 12, 14), the function is
- A. Independent of one variable
- B. Independent of two variables
- C. Independent of three variables
- D. Dependent on all variables
Answer: B. Independent of two variables
Explanation: The function simplifies to x XOR z (or x'z + xz'). It is independent of w and y.
Question 21
In which addressing mode, the effective address of the operand is generated by adding a constant value to the content of a register?
- A. Absolute mode
- B. Indirect mode
- C. Immediate mode
- D. Index mode
Answer: D. Index mode
Explanation: Index addressing mode calculates EA = Base + Displacement (Index).
Question 22
A certain microprocessor requires 4.5 microseconds to respond to an interrupt. Assuming that the three interrupts I1, I2 and I3 require the following execution time after the interrupt is recognized: 25, 35, 20us. I1 has highest priority, I3 lowest. What is the possible range of time for I3 to be executed?
- A. 24.5 microseconds to 39.5 microseconds
- B. 24.5 microseconds to 93.5 microseconds
- C. 4.5 microseconds to 24.5 microseconds
- D. 29.5 microseconds 93.5 microseconds
Answer: B. 24.5 microseconds to 93.5 microseconds
Explanation: Min time (no other interrupts): 4.5 (response) + 20 (exec) = 24.5. Max time (I1 and I2 occur): 4.5 + 25 (I1) + 4.5 + 35 (I2) + 4.5 + 20 (I3) = 93.5.
Question 23
The process of organizing the memory into two banks to allow 8 and 16 bit data operation is called
- A. Bank switching
- B. Indexed mapping
- C. Two-way memory interleaving
- D. Memory segmentation
Answer: C. Two-way memory interleaving
Explanation: Interleaving allows simultaneous access to adjacent memory locations (banks), supporting different data widths efficiently.
Question 24
Suppose the numbers 7, 5, 1, 8, 3, 6, 0, 9, 4, 2 are inserted in that order into an initially empty binary search tree. What is the in-order traversal sequence of the resultant tree?
- A. 7 5 1 0 3 2 4 6 8 9
- B. 0 2 4 3 1 6 5 9 8 7
- C. 0 1 2 3 4 5 6 7 8 9
- D. 9 8 6 4 2 3 0 1 5 7
Answer: C. 0 1 2 3 4 5 6 7 8 9
Explanation: The in-order traversal of a binary search tree always yields the sorted sequence of the inserted elements.
Question 25
A data structure is required for storing a set of integers such that operations 'deletion of smallest' and 'insertion' can be done in log n time. Which data structure is best?
- A. A heap can be used but not a balanced binary search tree
- B. A balanced binary search tree can be used but not a heap
- C. Both balanced binary search tree and heap can be used
- D. Neither balanced search tree nor heap can be used
Answer: B. A balanced binary search tree can be used but not a heap
Explanation: Heaps support efficient find-min/delete-min but checking 'if element is not already present' (search) is O(n). Balanced BSTs support search, insert, and delete-min all in O(log n).
Question 26
The following numbers are inserted into an empty binary search tree in the given order: 10, 1, 3, 5, 15, 12, 16. What is the height of the binary search tree?
Answer: B. 3
Explanation: Tree: 10 -> (L: 1 -> R: 3 -> R: 5) and (R: 15 -> L: 12, R: 16). Path 10-1-3-5 has 3 edges. Height = 3.
Question 27
Assume that the operators +, -, x are left associative and ^ is right associative. The postfix expression corresponding to a + b x c - d ^ e ^ f is
- A. abc x + def ^ ^ -
- B. abc x + de ^ f ^ -
- C. ab + c x d - e ^ f ^
- D. - + a x bc ^ ^ def -
Answer: A. abc x + def ^ ^ -
Explanation: Precedence: ^ > x > +,-. Right assoc of ^ means d^e^f is d^(e^f). Steps: a + (b*c) - (d^(e^f)) -> abc*+ def^^ -.
Question 28
The infix expression A + (B - C)*D is correctly represented in prefix notation as
- A. A + B - C * D
- B. + A * - B C D
- C. A B C - D * +
- D. A + BC - D *
Answer: B. + A * - B C D
Explanation: A + ((B-C)*D) -> A + (* - B C D) -> + A * - B C D.
Question 29
A one dimensional array A has indices 1 ... 75. Each element is a string and takes up three memory words. The array is stored location 1120 decimal. The starting address of A[49] is
- A. 1267
- B. 1164
- C. 1264
- D. 1169
Answer: C. 1264
Explanation: Addr(A[i]) = Base + (i - Lower) * Size. Addr = 1120 + (49 - 1) * 3 = 1120 + 144 = 1264.
Question 30
The five items: A, B, C, D, and E are pushed in a stack... popped four times... inserted in queue... two deleted from queue... pushed back on stack... one popped. The popped item is
Answer: D. D
Explanation: Stack: [ABCDE]. Pop 4: E,D,C,B. Queue: E,D,C,B. Delete 2: E, D. Stack: [A, E, D]. Pop 1: D.
Question 31
A full binary tree with n leaves contains
- A. n nodes
- B. log2 n nodes
- C. 2n - 1
- D. 2^n nodes
Answer: C. 2n - 1
Explanation: In a full binary tree (where every node has 0 or 2 children), if there are L leaves, the total number of nodes N = 2L - 1.
Question 32
The expression 1 * 2 ^ 3 * 4 ^ 5 * 6 will be evaluated as
- A. 32^30
- B. 162^30
- C. 49152
- D. 173458
Answer: C. 49152
Explanation: Precedence: ^ > *. 2^3 = 8. 4^5 = 1024. Expression: 1 * 8 * 1024 * 6 = 49152.
Question 33
The feature in object-oriented programming that allows the same operation to be carried out differently, depending on the object, is
- A. Inheritance
- B. Polymorphism
- C. Over functioning
- D. Overriding
Answer: B. Polymorphism
Explanation: Polymorphism allows objects of different classes to respond to the same method call in their own way.
Question 34
The microinstructions stored in the control memory of a processor have a width of 26 bits... micro op 13 bits... X field... Y field... 8 status bits... size of control memory?
- A. 10, 3, 1024
- B. 8, 5, 256
- C. 5, 8, 2048
- D. 10, 3, 512
Answer: A. 10, 3, 1024
Explanation: Total 26 bits. Op 13. Status bits 8 -> MUX select Y needs 3 bits. Next addr X = 26-13-3=10 bits. Address space 2^10 = 1024 words.
Question 35
A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which of the following is a legal program counter (all values in decimal)?
Answer: C. 600
Explanation: Instructions are 24 bits = 3 bytes long. PC addresses must be multiples of 3 relative to start (300). 600-300=300 (divisible by 3). 400, 500, 700 are not.
Question 36
Consider a disk pack with 16 surfaces, 128 tracks per surface and 256 sectors per track. 512 bytes of data... Capacity and bits for address?
- A. 256 Mbyte, 19 bits
- B. 256 Mbyte, 28 bits
- C. 512 Mbyte, 20 bits
- D. 64 Gbyte, 28 bits
Answer: A. 256 Mbyte, 19 bits
Explanation: Capacity = 16 * 128 * 256 * 512 = 256 MB. Address bits = log2(16)+log2(128)+log2(256) = 4+7+8 = 19 bits.
Question 37
Consider a pipelined processor with the following four stages... Operand forwarding is used... Number of clock cycles for 3 instructions (ADD, MUL, SUB)?
Answer: B. 8
Explanation: With operand forwarding, stalls are minimized. ADD (1 cycle exec), MUL (3 cycles exec), SUB (1 cycle). MUL depends on ADD (no stall with forwarding). SUB depends on MUL (stall until MUL finishes). Timeline analysis yields 8 cycles.
Question 38
The use of multiple register windows with overlap causes a reduction in the number of memory accesses for
- A. Function locals and parameters
- B. Register saves and restores
- C. Instruction fetches
- D. 1 only
- E. 2 only
- F. 3 only
- G. 1, 2 and 3
Answer: D. 1 only
Explanation: Register windows reduce memory traffic for passing parameters and saving local variables during function calls. (Question format in image slightly confusing, answer is 1).
Question 39
A processor that has carry, overflow and sign flag bits... addition of 01001101 and 11101001... status of flags?
- A. 1, 1, 0
- B. 1, 0, 0
- C. 0, 1, 0
- D. 1, 0, 1
Answer: B. 1, 0, 0
Explanation: 77 + (-23) = 54. 01001101 + 11101001 = 1 00110110. Carry=1. Sign=0. Overflow=0 (Pos+Neg never overflows).
Question 40
The two numbers given below are multiplied using the Booth's algorithm... How many additions/subtractions are required?
Answer: B. 8
Explanation: Counting transitions in the multiplier (0111011110111101) including implicit LSB 0. There are 8 transitions (0-1 or 1-0).
Question 41
The addition of 4-bit, two's complement, binary numbers 1101 and 0100 results in
- A. 0001 and an overflow
- B. 1001 and no overflow
- C. 0001 and no overflow
- D. 1001 and an overflow
Answer: C. 0001 and no overflow
Explanation: (-3) + (4) = 1. 1101 + 0100 = (1)0001. Result is 1. No overflow (signs different).
Question 42
Which of the following statements about relative addressing mode is FALSE?
- A. It enables reduced instruction size
- B. It allows indexing of array element with same instruction
- C. It enables easy relocation of data
- D. It enables faster address calculation than absolute addressing
Answer: D. It enables faster address calculation than absolute addressing
Explanation: Relative addressing requires an addition (PC + Offset), whereas absolute addressing requires no calculation (Address is in instruction).
Question 43
Substitution of values for names (whose values are constants) is done in
- A. Local optimization
- B. Loop optimization
- C. Constant folding
- D. Strength reduction
Answer: C. Constant folding
Explanation: Constant folding is the process of recognizing and evaluating constant expressions at compile time.
Question 44
A root alpha of equation f(x) = 0 can be computed to any degree of accuracy if a 'good' initial approximation x0 is chosen for which
- A. f(x0) > 0
- B. f(x0) f''(x0) > 0
- C. f(x0) f''(x0) < 0
- D. f''(x0) > 0
Answer: B. f(x0) f''(x0) > 0
Explanation: Convergence of Newton-Raphson is guaranteed if f(x0) * f''(x0) > 0.
Question 45
Which of the following statement is correct (Difference operator)
- A. Delta(uk vk) = uk Delta vk + vk Delta uk
- B. Delta(uk vk) = vk+1 Delta uk + uk Delta vk
- C. Delta(uk vk) = vk+1 Delta uk + uk+1 Delta vk
- D. Delta(uk vk) = uk+1 Delta vk + vk Delta uk
Answer: B. Delta(uk vk) = vk+1 Delta uk + uk Delta vk
Explanation: The product rule for finite differences is Delta(uv) = u Delta v + v(k+1) Delta u. (Or equivalent forms).
Question 46
The shift operator E is defined as E[f(xi)] = f(xi + h) and E^-1[f(xi)] = f(xi - h). Then Delta (forward difference) in terms of E is
- A. E - 1
- B. E
- C. 1 - E^-1
- D. 1 - E
Answer: A. E - 1
Explanation: Delta f(x) = f(x+h) - f(x) = E f(x) - f(x) = (E-1) f(x).
Question 47
The formula int y dx approx h/12 (...) is called
- A. Simpson rule
- B. Trapezoidal rule
- C. Romberg's rule
- D. Gregory's formula
Answer: D. Gregory's formula
Explanation: The formula involving correction terms with deltas/nablas is Gregory's integration formula.
Question 48
The cubic polynomial y(x) which takes the following values: y(0)=1, y(1)=0, y(2)=1 and y(3)=10 is
- A. x³ + 2x^2 + 1
- B. x³ + 3x^2 - 1
- C. x³ + 1
- D. x³ - 2x^2 + 1
Answer: D. x³ - 2x^2 + 1
Explanation: Testing options: At x=1, y=0. (d) 1 - 2 + 1 = 0. Matches.
Question 49
x = a cos(t), y = b sin(t) is the parametric form of
- A. Ellipse
- B. Hyperbola
- C. Circle
- D. Parabola
Answer: A. Ellipse
Explanation: (x/a)^2 + (y/b)^2 = cos² t + sin² t = 1. Equation of an ellipse.
Question 50
The value of x at which y is minimum for y = x² - 3x + 1 is
Answer: B. 3/2
Explanation: dy/dx = 2x - 3 = 0 => x = 1.5 (3/2).
Question 51
The formula Pk = ... is
- A. Newton's backward formula
- B. Gauss forward formula
- C. Gauss backward formula
- D. Stirling's formula
Answer: A. Newton's backward formula
Explanation: Standard ISRO key indicates Newton's backward formula.
Question 52
If G is a graph with e edges and n vertices the sum of the degrees of all vertices in G is
Answer: D. 2 e
Explanation: Handshaking lemma: Sum of degrees = 2 * number of edges.
Question 53
Let G be an arbitrary graph with n nodes and k components. If a vertex is removed from G, the number of components in the resultant graph must necessarily lie down between
- A. k and n
- B. k - 1 and k + 1
- C. k - 1 and n
- D. k + 1 and n - k
Answer: C. k - 1 and n
Explanation: Removing a vertex can reduce components by 1 (if isolated) or increase them (if cut vertex). Max components is n-1.
Question 54
A graph in which all nodes are of equal degree is known as
- A. Multigraph
- B. Non regular graph
- C. Regular graph
- D. Complete graph
Answer: C. Regular graph
Explanation: In a k-regular graph, every vertex has degree k.
Question 55
In a graph G there is one and only one path between every pair of vertices then G is a
- A. Path
- B. Walk
- C. Tree
- D. Circuit
Answer: C. Tree
Explanation: A tree is a connected graph with no cycles, ensuring a unique path between any two nodes.
Question 56
A simple graph (a graph without parallel edge or loops) with n vertices and k components can have at most
- A. n edges
- B. n - k edges
- C. (n - k)(n - k + 1)
- D. (n - k)(n - k + 1)/2 edges
Answer: D. (n - k)(n - k + 1)/2 edges
Explanation: Max edges occur when one component is a complete graph of n-k+1 vertices and rest are isolated.
Question 57
Consider the polynomial p(x) = a0 + a1x + a2x^2 + a3x^3, where ai != 0. The minimum number of multiplications needed to evaluate p on an input x is
Answer: A. 3
Explanation: Using Horner's method: a0 + x(a1 + x(a2 + x(a3))). 3 multiplications.
Question 58
Consider the following code written in a pass-by-reference language... subroutine swap(ix, iy)... call swap(ia, ib+5)... print ia, ib
- A. 13, 8
- B. 8, 3
- C. 13, 3
- D. 8, 13
Answer: A. 13, 8
Explanation: With pass-by-reference, the expression 'ib+5' evaluates to 8 (temp location). Swap exchanges ia (3) and temp (8). ia becomes 8? Wait. \nia=3, ib=8. Call swap(ia, 13). ix refers to ia, iy refers to temp(13). \nSwap: ia becomes 13, temp becomes 3. \nResult: ia=13, ib=8. (ib is not changed). Output 13, 8.
Question 59
A square matrix A is called orthogonal if A'A =
Answer: A. I
Explanation: Definition of orthogonal matrix.
Question 60
If two adjacent rows of a determinant are interchanged, the value of the determinant
- A. becomes zero
- B. remains unaltered
- C. becomes infinite
- D. becomes negative of its original value
Answer: D. becomes negative of its original value
Explanation: Property of determinants.
Question 61
If determinant of [[3, 3], [x, 5]] = 3, the value of x is
Answer: C. 4
Explanation: 15 - 3x = 3 => 3x = 12 => x = 4.
Question 62
If A, B, C are any three matrices, then A' + B' + C' is equal to
- A. a null matrix
- B. A + B + C
- C. (A + B + C)'
- D. -(A + B + C)
Answer: C. (A + B + C)'
Explanation: Transpose of sum is sum of transposes.
Question 63
Determinant of [[265, 240, 219], [240, 225, 198], [219, 198, 181]] =
Answer: C. 0
Explanation: The rows are linearly dependent (or differences are consistent), resulting in zero determinant.
Question 64
Let f(x) be the continuous probability density function of a random variable x, the probability that a < x <= b is
- A. f(b-a)
- B. f(b) - f(a)
- C. integral from a to b of f(x)dx
- D. integral from a to b of xf(x)dx
Answer: C. integral from a to b of f(x)dx
Explanation: Probability is the area under the PDF curve.
Question 65
If the mean of a normal frequency distribution of 1000 items is 25 and its standard deviation is 2.5, then its maximum ordinate is
- A. 1000 e^-25 / $\sqrt{2pi}$
- B. 1000 / $\sqrt{2pi}$
- C. 1000 e^-2.5 / $\sqrt{2pi}$
- D. 400 / $\sqrt{2pi}$
Answer: D. 400 / $\sqrt{2pi}$
Explanation: Max ordinate is at mean. Value = N / (sigma * $\sqrt{2pi}$). 1000 / (2.5 * $\sqrt{2pi}$) = 400 / $\sqrt{2pi}$.
Question 66
If the pdf of a Poisson distribution is given by f(x) = e^-2 2^x / x! then its mean is
Answer: B. 2
Explanation: For Poisson, mean = lambda. Here lambda = 2.
Question 67
Activities which ensure that the software that has been build, is traceable to customer requirement is covered as part of
- A. Verification
- B. Validation
- C. Maintenance
- D. Modeling
Answer: B. Validation
Explanation: Validation ensures 'Are we building the right product?' (Customer requirements).
Question 68
A testing method which is normally used as the acceptance test for a software system, is
- A. Regression Testing
- B. Validation
- C. Unit Testing
- D. System Testing
Answer: B. Validation
Explanation: Acceptance testing is a form of Validation (often called Beta testing or UAT). Note: ISRO key sometimes points to 'Regression' or 'System', but Validation is the best fit.
Question 69
The 'command' used to change contents of one database using the contents of another database by linking them on a common key field?
- A. Replace
- B. Join
- C. Change
- D. Update
Answer: D. Update
Explanation: SQL UPDATE command with JOIN logic.
Question 70
A locked database file can be
- A. Accessed by only one user
- B. Modified by users with the correct password
- C. Used to hide sensitive information
- D. Updated by more than one user
Answer: A. Accessed by only one user
Explanation: Locking prevents concurrent access to maintain consistency.
Question 71
Which of the following contains complete record of all activity that affected the contents of a database during a certain period of time?
- A. Transaction log
- B. Query language
- C. Report writer
- D. Data manipulation language
Answer: A. Transaction log
Explanation: The log records all modifications for recovery purposes.
Question 72
Purpose of 'Foreign Key' in a table is to ensure
- A. Null Integrity
- B. Referential Integrity
- C. Domain Integrity
- D. Null and Domain Integrity
Answer: B. Referential Integrity
Explanation: Foreign keys ensure that relationships between tables remain consistent.
Question 73
Which of the following scenarios may lead to an irrecoverable error in a database system?
- A. A transaction writes a data item after it is read by an uncommitted transaction
- B. A transaction reads a data item after it is read by an uncommitted transaction
- C. A transaction reads a data item after it is written by an committed transaction
- D. A transaction reads a data item after it is written by an uncommitted transaction
Answer: D. A transaction reads a data item after it is written by an uncommitted transaction
Explanation: This is a dirty read. If the uncommitted transaction aborts, the reading transaction has invalid data and might have committed, making it irrecoverable.
Question 74
Use of IPSEC in tunnel mode results in
- A. IP packet with same header
- B. IP packet with new header
- C. IP packet without header
- D. No changes in IP packet
Answer: B. IP packet with new header
Explanation: Tunnel mode encapsulates the entire original IP packet and adds a new IP header.
Question 75
Special software to create a job queue is called a
- A. Driver
- B. Spooler
- C. Interpreter
- D. Linkage editor
Answer: B. Spooler
Explanation: Spooling (Simultaneous Peripheral Operations On-Line) buffers jobs (like print jobs) in a queue.
Question 76
Process is
- A. A program in high level language kept on disk
- B. Contents of main memory
- C. A program in execution
- D. A job in secondary memory
Answer: C. A program in execution
Explanation: Standard definition of a process.
Question 77
When a process is rolled back as a result of deadlock the difficulty which arises is
- A. Starvation
- B. System throughput
- C. Low device utilization
- D. Cycle stealing
Answer: A. Starvation
Explanation: If the same process is always picked for rollback, it may never complete (starvation).
Question 78
On receiving an interrupt from an I/O device, the CPU
- A. Halts for a predetermined time
- B. Branches off to the interrupt service routine after completion of the current instruction
- C. Branches off to the interrupt service routine immediately
- D. Hands over control of address bus and data bus to the interrupting device
Answer: B. Branches off to the interrupt service routine after completion of the current instruction
Explanation: The CPU completes the current instruction cycle before acknowledging the interrupt and branching.
Question 79
Compared to CISC processors, RISC processors contain
- A. More register and smaller instruction set
- B. larger instruction set and less registers
- C. less registers and smaller instruction set
- D. more transistor elements
Answer: A. More register and smaller instruction set
Explanation: RISC architectures use simple instructions and a large register file.
Question 80
Which of the following is/are true of the auto-increment addressing mode? 1. It is useful in creating self-relocating code 2. If it is included in an Instruction set architecture, then an additional ALU is required for effective calculations 3. The amount of increment depends on the size of the data item accessed
- A. 1 only
- B. 2 only
- C. 3 only
- D. 2 and 3 only
Answer: C. 3 only
Explanation: Auto-increment advances the pointer by the size of the data element accessed (e.g., 2 for word, 4 for double).