ISRO Computer Science (CSE) 2007 - Question 3

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The circuit shown in the given Figure is a

  • A. full adder
  • B. full subtracter
  • C. shift register
  • D. decade counter

Answer: B. full subtracter

Explanation: The circuit involves XOR gates, AND gates and NOT/OR logic typical of arithmetic circuits. With 3 inputs (A, B, C) and Difference/Borrow outputs, it represents a full subtractor.

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