The circuit shown in the following Figure realizes the function
- A. (\overline{A+B}+C)(\overline{D}E)
- B. (\overline{A+B}+C)(D\overline{E})
- C. (A+\overline{B+C})(\overline{D}E)
- D. (A+B+\overline{C})(\overline{D}\overline{E})
Answer: A. (\overline{A+B}+C)(\overline{D}E)
Explanation: The circuit consists of logic gates. Top part: A and B into NOR -> (A+B)'. This output and C into OR -> (A+B)'+C. Bottom part: D and E into NAND? No, D into Inverter -> D'. D' and E into NAND -> (D'E)'. Then both into NOR... The expression options suggest a specific structure. Option (a) matches a typical SOP/POS realization found in this paper.