ISRO Electronics & Communication (ECE) 2017 - Question 15

All ISRO Electronics & Communication (ECE) papers | ISRO Electronics & Communication (ECE) 2017

Topic: Digital Circuits

Consider a logic circuit with 4 inputs $I_{0}, I_{1}, I_{2}, I_{3}$ producing outputs A and B such that $A = \overline{I}_{3}\overline{I}_{2}I_{1} + I_{3}$ and $B = \overline{I}_{3}I_{2} + I_{3}$. The circuit acts as a

  • A. 4:1 Multiplexer
  • B. De-Multiplexer
  • C. BCD circuit
  • D. 4 to 2 Priority Encoder

Answer: D. 4 to 2 Priority Encoder

Explanation: The given boolean expressions denote the logic for a 4-to-2 Priority Encoder. The output $B$ handles the MSB which is high if $I_3$ or $I_2$ is high. Output $A$ is high if $I_3$ is high, or if $I_3, I_2$ are low and $I_1$ is high. This follows the standard priority encoding scheme where higher indexed inputs take precedence.

| | All questions of ISRO Electronics & Communication (ECE) 2017