ISRO Electronics & Communication (ECE) 2010 - Question 21

All ISRO Electronics & Communication (ECE) papers | ISRO Electronics & Communication (ECE) 2010

Topic: Electronics Engineering

For CMOS implementation of input XOR logic gate, how many nMOS and pMOS transistors are required?

  • A. 2 nMOS and 2 pMOS
  • B. 3 nMOS and 3 pMOS
  • C. 6 nMOS and 6 pMOS
  • D. 8 nMOS and 8 pMOS

Answer: C. 6 nMOS and 6 pMOS

Explanation: Using transmission gate logic $Y = A\overline{B} + \overline{A}B$. For NOT gate one NMOS and 1 PMOS are required. The logic requires a minimum of 6 nMOS and 6 pMOS for a standard robust implementation.

| | All questions of ISRO Electronics & Communication (ECE) 2010