ISRO Electrical Engineering (EE) 2023 - Question 13

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Find the output voltage at VL for the following circuit [Figure description: A sinusoidal input Vi of period T drives the non-inverting (+) input of an op-amp (supply 15 V) connected as a voltage follower (output tied to inverting input). The op-amp output goes through a capacitor C to a node with a resistor R to ground, then a diode D (in series, left to right) to the output VL with load resistor RL to ground. Options are four waveforms against time with T/2 and T marked.]

  • A. Waveform (a): a rectangular pulse train, high for 0 to T/2 and zero for T/2 to T |
  • B. Waveform (b): sharp decaying exponential spikes, positive at 0 and T and negative at T/2 and 3T/2
  • C. Waveform (c): sharp positive decaying exponential spikes only at 0 and T (negative spikes removed)
  • D. Waveform (d): sharp negative decaying exponential spikes only at T/2 and 3T/2

Answer: C. Waveform (c): sharp positive decaying exponential spikes only at 0 and T (negative spikes removed)

Explanation: The op-amp output swings between the rails; the C–R network differentiates the edges, and the diode passes only the positive spikes.

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