The output 0 and 1 level for TTL Logic family is approximately
- A. 0.1 and 5 V
- B. 0.6 and 3.5 V
- C. 0.9 and 1.75 V
- D. 1.75 and 0.9 V
Answer: A. 0.1 and 5 V
Explanation: Ideally 0V and 5V, practically Vol < 0.4V and Voh > 2.4V. Option A is the closest ideal representation.