ISRO Electrical Engineering (EE) 2019 - Question 61

All ISRO Electrical Engineering (EE) papers | ISRO Electrical Engineering (EE) 2019

In a JK flip flop race around condition occurs when.

  • A. Both J & K inputs are zero
  • B. Both J & K inputs are one
  • C. J = 1 and K = 0
  • D. J = 0 and K = 1

| | All questions of ISRO Electrical Engineering (EE) 2019