ISRO Computer Science (CSE) 2008 - Question 37

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The ability to temporarily halt the CPU and use this time to send information on buses is called

  • A. direct memory access
  • B. vectoring the interrupt
  • C. polling
  • D. cycle stealing

Answer: D. cycle stealing

Explanation: Cycle stealing allows a DMA controller to access memory by temporarily suspending the CPU's memory access for a cycle.

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